Created: 1/7/99

Updated: 1/7/99

Guidebook for Managing Silicon Chip Reliability
by M. G. Pecht (CALCE EPSC), R. Radojcic (Cadence), and G. Rao (Intel)
CRC Press, Boca Raton, FL, 1999

Guidebook for Managing Silicon Chip Reliability discusses the principal reliability issues associated with the design, manufacture and use of modern integrated circuits. The text presents a set of best industry practices, based on the physics-of-failures, reliability statistics, and an understanding of interactions between the design and process attributes -- to manage reliability throughout the IC product lifecycle.

FEATURES

• Presents and analyzes the spectrum of failure mechanisms associated with modern ICs. For each failure mechanism the book offers:
  • description of the mechanism
  • modeling of the mechanism
  • how to detect and test
  • how to manage
• Examines deep sub-micron challenges, such as power dissipation, switching noise, and cross talk
• Outlines how to establish specifications for chip performance, cost, quality, and reliability
• Provides information on evolving IC technology generations, trends in IC packaging architectures, and future challenges

Contents:
1. How Devices Fail
2. Intrinsic Device Sensitivities
3. Electromigration
4. Hot Carrier Aging
5. Time-Dependent Dielectric Breakdown
6. Mechanical Stress-Induced Migration
7. Alpha Particle Sensitivity
8. Electrostatic Discharge and Electrical Overstress
9. Latchup
10. Design For Reliability
11. Process Development
12. Manufacturing
13. Qualification
14. Screening
15. Summary and References

ISBN: 0-8493-9624-7
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